A failed EMC test is one of the most expensive surprises in hardware development. It usually arrives late, after the board is built, and it often forces a respin plus a second lab slot. The good news is that most emissions and immunity problems are decided at design time, on the PCB, long before the product reaches a test chamber. This guide covers the layout decisions that let you pass EMC pre-compliance the first time.
1. Control the return current, not just the signal
Every signal has a return current that flows back to its source. At high frequency, that return takes the path of least inductance, which is directly under the trace on the nearest reference plane. If the plane is broken by a split, a gap or a connector cut-out, the return has to detour around it. That detour is a loop, and a loop is an antenna. Keep an unbroken reference plane under high-speed and switching signals, and never route a fast trace across a plane split.
2. Get the stack-up right early
The layer stack-up is the single most cost-free EMC lever you have, but only if you decide it at the start. Favour a stack that places each signal layer adjacent to a solid ground plane, keep the signal-to-plane spacing small, and put power and ground planes close together for low-impedance decoupling. A four-layer board with a proper ground plane will almost always outperform a two-layer board on emissions, for a marginal cost difference.
3. Decouple where the current is drawn
Decoupling capacitors work by supplying transient current locally so it does not have to travel across the board. Place them as close as possible to the supply pins, with short, wide connections to the planes, and choose values that cover the frequency range your device actually switches at. The loop area between the capacitor, the pin and the plane matters more than the capacitance value printed on the part.
4. Treat clocks and switching nodes as sources
Oscillators, high-speed buses and the switching node of a DC/DC converter are your main emitters. Keep their loops tight, keep them away from board edges and connectors, and avoid running them near cables that leave the enclosure. On switching regulators, the hot loop formed by the input capacitor, the high-side switch and the diode or synchronous FET should be as small as physically possible.
5. Filter at the boundary
Cables act as antennas, so anything that leaves the board is a potential emission path and an immunity entry point. Filter every interface at the connector: common-mode chokes on differential lines, small capacitors or ferrites on slower signals, and proper protection on power inputs. A little filtering at the boundary is cheaper than a shield added after a failed test.
6. Pre-compliance beats surprises
You do not need a full accredited chamber to de-risk EMC. A near-field probe, a spectrum analyser and a basic setup will show you where the energy is and whether a change helps, days before you book an expensive compliance slot. Catching a 6 dB margin problem on the bench is far cheaper than discovering it at the lab.
Most EMC failures trace back to a handful of layout decisions. Reviewing them before fabrication is one of the highest-return checks in electronics design.